Welcome to Journal of Network Communications and Emerging Technologies (JNCET)
Volume 6, Issue 12, December (2016)
S.No | Title & Authors | Full Text |
---|---|---|
1 | Implementation of Home Automation through Internet of Things Sweta Pattar, Dinesha H A |
Download |
2 | Reduction of Glitch Energy in Binary Weighted Current Steering DAC: Survey P.Karthika, T.Chelladurai |
Download |
3 | Design and Implementation of D Flip-Flops for maximum Performance VLSI using 180nm CMOS Technology Priyanka Tripathi, Divyanshu Rao, Ravi Mohan |
Download |
4 | Design and Implementation of Domino Logic Circuit in CMOS Ankita Sharma, Divyanshu Rao, Ravi Mohan |
Download |
5 | Design and Implementation of Ternary Logic Gates over a Quaternary Logic Neetu Verma, Divyanshu Rao, Ravi Mohan |
Download |
6 | Segmentation and Classification of MR Brain Images Using DT-CWT and Kernal SVM R. Sheeba Begam, M. Vandhana Lakshmi |
Withdrawn |
7 | A Survey, Study and Review on Performance Improvements in P2P Content Distribution Network M.Anandaraj, G. Muthupandi, P.Sivakumar |
Download |
8 | Design and Modelling Of PV Module Using Maximum Power Point Tracking Technique Nilesh P. Mendhe, Deepak Shahakar |
Download |
Publication Process
Accepted papers will be published online,upon receiving the final version from the authors in the upcoming issue.
Paper Submission
There is no deadline for paper submission. Authors are requested to send their unpublished manuscripts to: editor@jncet.org
Copyright
COPYRIGHT © EverScience Publications